1. Field of the Invention
This invention relates in general to a power control circuit for an optical information recording device. More specifically, this invention relates to a power control circuit suitable for a high-speed optical information recording device.
2. Description of Related Art
The optical information recording apparatus, such as a recordable (or re-writable) optical disk drive, becomes wide-used and popular because of a high demand of high capacity back-up. When a recordable optical disk drive records data or information to a Recordable/Re-Writable Compact Disc (CD-R/CD-RW), beam for recording data is generated by a laser diode. The laser diode has to provide three optical signals with different power during the entire recording process. The data region of an optical disc will alter its state in response to the optical signal with specified power.
FIG. 1 schematically shows a graph that power of an optical signal during writing varied with respect to its corresponding data area of an optical disc. The data area of a re-writable optical disc includes a space region and a mark region. The mark region records data that is encoded by logic “1” and logic “0”. The laser diode has to generate an optical signal with erase power PERASE to illuminate the optical disc when the laser beam reaches the space region. In addition, the laser diode has to generate optical signals with write power PWRITE and bias power PBIAS alternately to illuminate the optical disc when the laser beam reaches the mark region. When data is written to the mark region, the required times for generating the write power PWRITE and the bias power PBIAS is determined by the characteristic of the optical disc and the specification of data to be recorded.
However, the characteristic of the laser diode varies with the environment temperature and time. During the recording process, as the recording time increases, the temperature of the laser diode increases. Namely, under the condition that the driving signals inputted to the laser diode are the same, the laser diode outputs optical signals having different power due to different temperature. When the laser diode is aged, the optoelectronic characteristic of the laser diode may change. Therefore, a power control circuit for compensating power variation due to change of the optical characteristic of the laser diode is highly required. If the bias power is not compensated, the laser diode may completely turn off during certain periods, and to turn on the laser diode again requires a larger current or a longer time.
FIG. 2 shows a conventional power control circuit for a recordable optical disc. The laser diode D1 receives the driving signal from the laser diode driving circuit 202 to generate a corresponding optical signal. The optical signal is illuminated to an optical disc (not shown) for recording data on the optical disc. In order to compensate the optical signal, a photodiode D2 is used for sensing the optical signal emitted from the laser diode D1 to generate a corresponding power sampling signal PI. The power sampling signal PI comprises an erase period corresponding to an optical signal with erase power of PERASE, a write period corresponding to an optical signal with write power of PWRITE, a bias period corresponding to an optical signal with bias power of PBIAS. The power sampling signal PI is transmitted to an erase-period sample-and-hold circuit 204, a write-period sample-and-hold circuit 206, and a bias-period sample-and-hold circuit 208, respectively.
The erase-period sample-and-hold circuit 204 is controlled by an erase sampling control signal ESC to sample the power sampling signal PI within the erase period, by which an erase-period sample-and-hold signal EPSH is generated and then fed-back to a feedback control circuit 205. The feedback control circuit 205 converts the erase-period sample-and-hold signal EPSH to a signal that is acceptable to the laser diode driving circuit 202 and then transmits the converted signal to the laser diode driving circuit 202. The write-period sample-and-hold circuit 206 is controlled by a write sampling control signal WSC to sample the power sampling signal PI within the write period, by which a write-period sample-and-hold signal WPSH is generated and then fed-back to a feedback control circuit 205. The feedback control circuit 205 converts the write-period sample-and-hold signal WPSH to a signal that is acceptable to the laser diode driving circuit 202 and then transmits the converted signal to the laser diode driving circuit 202. The bias-period sample-and-hold circuit 208 is controlled by a bias sampling control signal BSC to sample the power sampling signal PI within the bias period, by which a bias-period sample-and-hold signal BPSH is generated and then fed-back to the feedback control circuit 205. The feedback control circuit 205 converts the bias-period sample-and-hold signal EPSH to a signal that is acceptable to the laser diode driving circuit 202 and then transmits the converted signal to the laser diode driving circuit 202. Accordingly, the laser diode driving circuit 202 alters the driving signal that is outputted to the laser diode D1 according to the erase-period sample-and-hold signal EPSH, the write-period sample-and-hold signal WPSH, and the bias-period sample-and-hold signal BPSH so as to adjust the erase power, the write power and the bias power of the optical signal, by which the compensation for the optical signal is completed.
FIG. 3 shows waveforms of the power sampling signal PI, the write sampling control signal WSC and the bias sampling control signal BSC in FIG. 2. FIG. 3 only shows the waveforms in the write period and the bias period of the power sampling signal PI. Operation for a general sample-and-hold circuit includes a sampling operation and a holding operation. Therefore, when the write sampling control signal WSC is at high level, the write period sample-and-hold circuit 206 samples the power sampling signal PI, and when the write sampling control signal WSC is at low level, the write period sample-and-hold circuit 206 holds the level of the power sampling signal PI that is sampled as the write sampling control signal WSC is transient from high level to low level. The bias period sample-and-hold circuit 208 is controlled by the bias sampling control signal BSC in the same manner. Accordingly, the write period sample-and-hold circuit 206 is controlled by the write sampling control signal WSC to sample the power sampling signal PI when the write sampling control signal WSC becomes high level within the write period of the power sampling signal PI, by which the signal level of the power sampling signal PI is obtained. This sampled signal level corresponds to the write power of the light beam emitted by the laser diode within the write period. Similarly, the bias period sample-and-hold circuit 208 is controlled by the bias sampling control signal BSC to sample the power sampling signal PI when the bias sampling control signal BSC becomes high level within the bias period of the power sampling signal PI, by which the signal level of the power sampling signal PI is obtained. This sampled signal level corresponds to the bias power of the light beam emitted by the laser diode within the bias period.
The sampling time for the general sample-and-hold circuit has to be larger than a specified value so that the sample-and-hold circuit can operate normally. As the technology of the recordable optical disk drive is highly developed, a high-speed recordable optical disk drive becomes the main product gradually in the market. However, if the recordable optical disk drive is operated in high speed, the frequency of power sampling signal PI increases, causing that intervals of the write period and the bias period are shortened. In the situation, because the general sample-and-hold circuit is not fast enough, the sampling time becomes too long so that the signal levels in the write period and the bias period of the sampling signal PI cannot be correctly sampled.
FIG. 4 shows relevant high frequency waveforms of the power sampling signal PI, the write sampling control signal WSC and the bias sampling control signal. When the frequency of the power sampling signal PI increases and the write period and the bias period are shortened, the conventional power control circuit of the recordable optical disk drive cannot sample the signal levels correctly because of the speed limitation of the write sample-and-hold circuit 206 and the bias sample-and-hold circuit 208, thereby the optical signals from the laser diode cannot be correctly compensated. However, if a high-speed sample-and-hold circuit is used, cost becomes higher. Therefore, it is necessary to develop a power control circuit that is suitable for a high-speed recordable optical disk drive without the need of high cost sample-and-hold circuit.